Title
Synchronous Digital Implementation of the AER Communication Scheme for Emulating Large-Scale Spiking Neural Networks Models
Abstract
In this paper we shall present a fully synchronous digital implementation of the Address Event Representation (AER) communication scheme that has been used in the PERPLEXUS chip in order to permit the emulation of large-scale biologically inspired spiking neural networks models. By introducing specific commands in the AER protocol it is possible to distribute the AER bus among a large number of chips where the functionality of the spiking neurons is being emulated. A careful design of the AER encoder module using compact Content Addressable Memories (CAMs) allows for a feasible realization of large-scale models.
Year
DOI
Venue
2009
10.1109/AHS.2009.14
AHS
Keywords
Field
DocType
address event representation,networks models,communication scheme,synchronous digital implementation,spiking neuron,large-scale model,emulating large-scale spiking neural,aer bus,aer encoder module,large-scale biologically,perplexus chip,aer communication scheme,aer protocol,careful design,chip,encoding,spiking neural network,neural nets,computer aided manufacturing,emulation,decoding,protocols,registers,content addressable memory
Computer science,Real-time computing,Chip,Emulation,Encoder,Content-addressable storage,Decoding methods,Spiking neural network,Artificial neural network,Encoding (memory)
Conference
Citations 
PageRank 
References 
1
0.43
11
Authors
3
Name
Order
Citations
PageRank
J. Manuel Moreno1284.71
Jordi Madrenas215027.87
Lukasz Kotynia310.43