Name
Abstract | ||
|---|---|---|
This paper describes the design of a 12-bit digital-to-analog converter for a wireline modem chip implemented in a 0.13mum digital CMOS technology. Transistor-level simulations from extracted layout at the nominal modem data rate of 80MS/s show an spurious-free dynamic-range (SFDR) better than 62dB at Nyquist rate under industrial operation conditions (-40 to 85deg temperature range and plusmn10% supply variations) and for all technology process corners. Additionally, the converter achieves a multi-tone power ratio (MTPR) higher than 59dB for different discrete multitone (DMT) test patterns consisting of 1536 carriers that fall in the Nyquist band. Simulation results at a higher data rate of 200MS/s are also shown in the paper. The converter dissipates less than 150mW from a mixed 3.3/1.2V supply and occupies less than 1.7mm2 |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/APCCAS.2006.342087 | Singapore |
Keywords | Field | DocType |
CMOS digital integrated circuits,digital-analogue conversion,embedded systems,0.13 micron,1.2 V,3.3 V,current steering D/A converter,digital CMOS technology,digital-to-analog converter,embedded systems,switching sequence,wireline modem chip,Current-steering,D/A converters,Digital-to-analog converters,Switching sequence | Wireline,Process corners,Computer science,12-bit,Electronic engineering,Spurious-free dynamic range,CMOS,Chip,Digital-to-analog converter,Electrical engineering,Nyquist rate,Embedded system | Conference |
ISBN | Citations | PageRank |
1-4244-0387-1 | 0 | 0.34 |
References | Authors | |
3 | 9 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jesús Ruiz-Amaya | 1 | 28 | 4.70 |
| Manuel Delgado-Restituto | 2 | 80 | 24.59 |
| Juan Francisco Fernández-Bootello | 3 | 0 | 0.68 |
| Brandano, D. | 4 | 0 | 0.34 |
| R. Castro-López | 5 | 79 | 18.20 |
| José Manuel De La Rosa | 6 | 80 | 23.92 |
| Ruiz-Amaya, J. | 7 | 0 | 0.34 |
| Delgado-Restituto, M. | 8 | 8 | 3.00 |
| Fernandez-Bootello, J.F. | 9 | 0 | 0.68 |