Paper Info
Title
Tasking with out-of-order spawn in TLS chip multiprocessors: microarchitecture and compilation
Abstract
Chip Multiprocessors (CMPs) are flexible, high-frequency platforms on which to support Thread-Level Speculation (TLS). However, for TLS to deliver on its promise, CMPs must exploit multiple sources of speculative task-level parallelism, including any nesting levels of both subroutines and loop iterations. Unfortunately, these environments are hard to support in decentralized CMP hardware: since tasks are spawned out-of-order and unpredictably, maintaining key TLS basics such as task ordering and efficient resource allocation is challenging.While the concept of out-of-order spawning is not new, this paper is the first to propose a set of microarchitectural mechanisms that, altogether, fundamentally enable fast TLS with out-of-order spawn in a CMP. Moreover, we develop a fully-automated TLS compiler for aggressive out-of-order spawn. With our mechanisms, a TLS CMP with four 4-issue cores achieves an average speedup of 1.30 for full SPECint 2000 applications; the corresponding speedup for in-order only spawn is 1.04. Overall, our mechanisms unlock the potential of TLS for the toughest applications.
Year
DOI
Venue
2005
10.1145/1088149.1088173
I4CS
Keywords
Field
DocType
average speedup,corresponding speedup,decentralized cmp hardware,fully-automated tls compiler,fast tls,4-issue core,out-of-order spawning,key tls basic,aggressive out-of-order,tls chip multiprocessors,tls cmp,high frequency,thread level speculation,out of order,compiler optimization,resource allocation
Computer science,Parallel computing,Real-time computing,Compiler,Exploit,Optimizing compiler,SPECint,Resource allocation,Out-of-order execution,Microarchitecture,Speedup
Conference
ISBN
Citations 
PageRank 
1-59593-167-8
57
2.10
References 
Authors
20
6
Name
Order
Citations
PageRank
Jose Renau176848.46
James Tuck256433.06
Wei Liu3112452.28
Luis Ceze42183125.93
Karin Strauss5111172.82
Josep Torrellas63838262.89