Name
Abstract | ||
|---|---|---|
This paper presents voltage mode multi-valued circuits to define a 4-valued bus. Two different versions are presented: TTL circuits for a 4-valued open collector bus, and TTL circuits for a 4-valued + high impedance bus. Some dynamic characteristics are shown. With usual load of a bus, the supplementary delay is less than 55 ns. |
Year | Venue | Keywords |
|---|---|---|
1978 | MVL '78 Proceedings of the eighth international symposium on Multiple-valued logic | supplementary delay,multi-valued circuit,4-valued bus,dynamic characteristic,4-valued open collector bus,usual load,high impedance bus,voltage mode,different version,ttl circuit |
DocType | Citations | PageRank |
Conference | 1 | 0.88 |
References | Authors | |
1 | 1 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Daniel Etiemble | 1 | 300 | 42.43 |