| Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors. | 4 | 0.46 | 2018 |
| Distanceless label propagation: An efficient direct connected component labeling algorithm for GPUs | 1 | 0.37 | 2017 |
| A new SIMD iterative connected component labeling algorithm. | 3 | 0.45 | 2016 |
| Automatic Task-Based Code Generation for High Performance Domain Specific Embedded Language. | 4 | 0.47 | 2016 |
| Color tracking with contextual switching: real-time implementation on CPU | 1 | 0.35 | 2015 |
| High level transforms for SIMD and low-level computer vision algorithms | 9 | 0.62 | 2014 |
| Parallel Smith-Waterman Comparison on Multicore and Manycore Computing Platforms with BSP++. | 8 | 0.60 | 2013 |
| AHDAM: an asymmetric homogeneous with dynamic allocator manycore chip | 0 | 0.34 | 2011 |
| A small footprint interleaved multithreaded processor for embedded systems. | 8 | 0.69 | 2011 |
| Comparison of Different Thread Scheduling Strategies for Asymmetric Chip MultiThreading Architectures in Embedded Systems | 2 | 0.40 | 2011 |
| High Performance SoC Design Using Magnetic Logic and Memory. | 8 | 0.92 | 2011 |
| Parallel Biological Sequence Comparison on Heterogeneous High Performance Computing Platforms with BSP++ | 1 | 0.38 | 2011 |
| Embedded MRAM for high-speed computing. | 3 | 0.41 | 2011 |
| Automatic color space switching for robust tracking. | 1 | 0.36 | 2011 |
| A framework for an automatic hybrid MPI+OpenMP code generation | 2 | 0.39 | 2011 |
| Towards a parameterizable cycle-accurate ISS in ArchC | 6 | 0.54 | 2010 |
| Customizing 16-bit FP Instructions on a NIOS II Processor for FPGA Image and Media Processing | 0 | 0.34 | 2005 |
| Des flottants 16 bits sur microprocesseurs d'usage général pour images et multimédia | 0 | 0.34 | 2005 |
| 16-Bit FP Sub-Word Parallelism to Facilitate Compiler Vectorization and Improve Performance of Image and Media Processing | 1 | 0.44 | 2004 |
| Why M-Valued Circuits are Restricted to a Small Niche. | 1 | 0.40 | 2003 |
| Numerical Applications and Sub-Word Parallelism: The NAS Benchmarks on a Pentium 4 | 0 | 0.34 | 2002 |
| MPI ou MPI+OpenMP sur grappes de multiprocesseurs? | 0 | 0.34 | 2002 |
| Understanding performance of SMP clusters running MPI programs | 10 | 0.82 | 2001 |
| MPI versus MPI+OpenMP on IBM SP for the NAS benchmarks | 87 | 10.56 | 2000 |
| Investigating the Performance of Two Programming Models for Clusters of SMP PCs | 16 | 1.99 | 2000 |
| Performance of the NAS Benchmarks on a Cluster of SMP PCs Using a Parallelization of the MPI Programs with OpenMP | 5 | 0.71 | 1999 |
| Performance evaluation of the memory hierarchy of a desktop PC using commodity chips with specific traces | 0 | 0.34 | 1997 |
| Complete x86 instruction trace generation from hardware bus collect | 6 | 1.01 | 1997 |
| An HPF Case Study of a Domain-Decomposition Based Irregular Application | 4 | 0.45 | 1997 |
| Communications in Parallel Architectures and Networks of Workstations: From Standardisation to New Standards | 2 | 1.33 | 1997 |
| Standard Microprocessors Versus Custom Processing Elements for Massively Parallel Architectures | 1 | 0.42 | 1995 |
| Parallel architecture and language in Europe | 1 | 0.34 | 1994 |
| Performance of CMOS Current Mode Full Adders | 11 | 1.70 | 1994 |
| CML current mode full adders for 2.5-V power supply | 6 | 0.60 | 1994 |
| A Parralel Architecture Based on Compiled Communication Schemes | 0 | 0.34 | 1993 |
| A communication architecture for a massively parallel message-passing multicomputer | 0 | 0.34 | 1993 |
| A basis for the comparison of binary and m-valued current mode circuits: the multioperand addition with redundant number systems | 4 | 0.94 | 1993 |
| PARLE '92: Parallel Architectures and Languages Europe, 4th International PARLE Conference, Paris, France, June 15-18, 1992, Proceedings | 76 | 8.15 | 1992 |
| 4-valued BiCMOS circuits for the transmission system of a massively parallel architecture | 0 | 0.34 | 1990 |
| Comparison of Binary and Multivalued ICs According to VLSI Criteria | 4 | 0.76 | 1988 |
| The Database Processor 'RAPID | 3 | 0.47 | 1987 |
| TTL circuits for a 4-valued bus a way to reduce package and interconnections | 1 | 0.88 | 1978 |
