Name
Title | ||
|---|---|---|
The flexible processor an approach for single-chip hardware emulation by dynamic reconfiguration |
Abstract | ||
|---|---|---|
A dynamically reconfigurable logic array, i.e., the Flexible Processor, suitable for a single chip emulation system is developed. It demonstrates the sequential execution of several sub-circuits divided temporally from an original large circuit. In order to accelerate emulation speed, a logic element, reducing total configuration data by 30% compared to conventional Look-Up-Table, and Temporal Communication Module (TCM) to support save/restore of circuit state and data communication among divided sub-circuits, are implemented on the Flexible Processor. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/ASPDAC.2004.1337647 | ASP-DAC |
Keywords | Field | DocType |
data communication,single-chip hardware emulation,total configuration data,original large circuit,flexible processor,single chip emulation system,logic element,divided sub-circuits,emulation speed,circuit state,dynamic reconfiguration,dynamically reconfigurable logic array,field programmable gate arrays,look up table,logic circuits,emulation,hardware,chip | Logic gate,Computer science,Field-programmable gate array,Chip,Electronic engineering,Emulation,Control reconfiguration,Logic element,Hardware emulation | Conference |
ISSN | ISBN | Citations |
2153-6961 | 0-7803-8175-0 | 0 |
PageRank | References | Authors |
0.34 | 2 | 8 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Takeshi Ohkawa | 1 | 21 | 16.24 |
| T. Nozawa | 2 | 4 | 2.26 |
| M. Fujibayashi | 3 | 3 | 1.49 |
| Naoto Miyamoto | 4 | 4 | 3.27 |
| Karnan Leo | 5 | 0 | 0.34 |
| Soichiro Kita | 6 | 0 | 0.34 |
| Koji Kotani | 7 | 163 | 33.37 |
| Tadahiro Ohmi | 8 | 114 | 36.98 |