Name
Title | ||
|---|---|---|
Run-time self-tuning banked loop buffer architecture for power optimization of dynamic workload applications |
Abstract | ||
|---|---|---|
Instruction memory organization is pointed out as one of the major sources of energy consumption in embedded systems. As embedded systems are characterized by restrictive resources and low energy budget, any enhancement in this component allows not only to decrease the total energy consumption, but also to have a better distribution of the energy budget throughout the system. This paper presents a self-tuning banked loop buffer architecture, which is based on a run-time loop buffer controller that optimizes both the dynamic and leakage energy consumption of the instruction memory organization. Results show that using banking in loop buffer architectures leads to higher reduction in the total energy consumption of the instruction memory organization if the tuning approach is applied sparingly. Based on post-layout simulations, our approach improves the total energy consumption by average of 20% in comparison with a loop buffer architecture based on a single monolithic memory, and more than 90% in comparison with instruction memory organizations without loop buffer architectures. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/VLSISoC.2011.6081635 | VLSI-SOC |
Keywords | Field | DocType |
power optimization,instruction memory organization,dynamic energy consumption,total energy consumption,run-time self-tuning banked loop buffer architecture,post-layout simulations,run-time loop buffer controller,single monolithic memory,buffer circuits,memory architecture,dynamic workload applications,embedded systems,leakage energy consumption,computer power supplies,energy budget distribution,organizations,vectors,memory management,mathematical model | Control theory,Interleaved memory,Power optimization,Computer science,Self-tuning,Memory management,Memory organisation,Energy consumption,Memory architecture,Embedded system | Conference |
ISBN | Citations | PageRank |
978-1-4577-0169-6 | 2 | 0.43 |
References | Authors | |
7 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Antonio Artés | 1 | 29 | 4.16 |
| José Luis Ayala | 2 | 6 | 3.55 |
| Ashoka Visweswara Sathanur | 3 | 127 | 10.99 |
| Jos Huisken | 4 | 378 | 38.11 |
| Francky Catthoor | 5 | 3932 | 423.30 |