Name
Title | ||
|---|---|---|
A methodology for automated design of embedded bit-flips detectors in post-silicon validation |
Abstract | ||
|---|---|---|
Post-silicon validation is concerned with detecting design errors that escape to silicon prototypes and need to be fixed before committing to high-volume manufacturing. Electrical errors are particularly difficult to catch during the pre-silicon phase because of the insufficient accuracy of device models, which is often traded-off against simulation time. This challenge is further aggravated by the rising number of voltage domains, especially if subtle errors are excited in unique electrical states. Since these electrically-induced subtle errors most commonly manifest in the logic domain as bit-flips, to the best of our knowledge there are no systematic methods to design embedded hardware monitors for generic logic blocks that can detect bit-flips with low detection latency. Toward this goal, we propose a methodology that relies on design assertions that are ranked based on their potential to detect bit-flips and subsequently mapped into user-constrained embedded hardware monitors with the aim to increase bit-flip coverage estimate. |
Year | Venue | Keywords |
|---|---|---|
2015 | DATE | controller area network,gateway,hardware,quality assurance,prototypes,post silicon validation,logic design,error detection,silicon |
Field | DocType | ISSN |
Automotive electronics,CAN bus,Post-silicon validation,Ranking,Computer science,Audio Video Bridging,Voltage,Real-time computing,Default gateway,Detector | Conference | 1530-1591 |
Citations | PageRank | References |
4 | 0.40 | 12 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Pouya Taatizadeh | 1 | 11 | 2.26 |
| Nicola Nicolici | 2 | 807 | 59.91 |