Paper Info
Title
7.7 Enterprise-grade 6x fast read and 5x highly reliable SSD with TLC NAND-flash memory for big-data storage
Abstract
An enterprise-grade SSD with TLC (3b/cell) NAND Flash is presented with three techniques that achieve high speed and high reliability. Quick low-density parity-check (LDPC) reduces the read latency of 1Xnm TLC NAND Flash SSD by 83%. Dynamic VTH optimization and auto data recovery reduce the NAND Flash bit-error rate (BER) by 80% and 18%, respectively. These techniques can be implemented in the SSD controller without circuit overhead. No modification is required to the TLC NAND flash.
Year
DOI
Venue
2015
10.1109/ISSCC.2015.7062965
ISSCC
Keywords
Field
DocType
ldpc,tlc nand flash ssd controller,low-density parity-check,big data,tlc nand-flash memory,autodata recovery,dynamic vth optimization,nand flash bit-error rate reduction,read latency reduction,ber,circuit overhead,big-data storage,enterprise-grade ssd,dynamic programming,error statistics,flash memories,reliability,bit error rate,sensors,optimization
Nand flash memory,Control theory,Flash file system,Low-density parity-check code,Latency (engineering),Computer science,NAND gate,Data recovery,Computer hardware,Bit error rate
Conference
Citations 
PageRank 
References 
3
0.44
4
Authors
6
Name
Order
Citations
PageRank
Tsukasa Tokutomi1203.23
Masafumi Doi2172.69
Shogo Hachiya351.57
Atsuro Kobayashi431.11
Shuhei Tanakamaru512118.35
Ken Takeuchi68843.27