Name
Abstract | ||
|---|---|---|
Due to the channel achieving property, the polar code has become one of the most favorable error-correcting codes. As the polar code achieves the property asymptotically, however, it should be long enough to have a good error-correcting performance. Although the previous fully parallel encoder is intuitive and easy to implement, it is not suitable for long polar codes because of the huge hardware complexity required. In this brief, we analyze the encoding process in the viewpoint of very-large-scale integration implementation and propose a new efficient encoder architecture that is adequate for long polar codes and effective in alleviating the hardware complexity. As the proposed encoder allows high-throughput encoding with small hardware complexity, it can be systematically applied to the design of any polar code and to any level of parallelism. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/TCSII.2014.2369131 | IEEE Trans. on Circuits and Systems |
Keywords | Field | DocType |
very-large-scale integration (vlsi) optimization,hardware complexity,partially parallel encoder architecture,parallel architectures,polar encoder,vlsi optimization,error correction codes,polar codes,very-large-scale integration implementation,error correcting codes,long polar codes,encoding process,computer architecture,decoding,encoding,hardware,registers | Concatenated error correction code,Computer science,Parallel computing,Block code,Communication channel,Encoder,Polar code,Linear code,Decoding methods,Encoding (memory) | Journal |
Volume | Issue | ISSN |
62 | 3 | 1549-7747 |
Citations | PageRank | References |
11 | 0.66 | 15 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hoyoung Yoo | 1 | 75 | 9.99 |
| In-Cheol Park | 2 | 888 | 124.36 |