Title
A 21-Gbit/s 1.63-pJ/bit Adaptive CTLE and One-Tap DFE With Single Loop Spectrum Balancing Method
Abstract
This brief presents an adaptive continuous-time linear equalizer (CTLE) and one-tap decision feedback equalizer (DFE) using the spectrum balancing (SB) method. The SB method is extended for not only CTLE but also DFE with the aid of gain characteristics of one-tap DFE. Thus, adaptation loops for each equalizer type are merged to a single loop. As a result, the complexity and power consumption of the adaptation circuits are reduced significantly. The test chip consumes 34.2 mW from 1.2 V supply with 65-nm CMOS process.
Year
DOI
Venue
2016
10.1109/TVLSI.2015.2418579
VLSI) Systems, IEEE Transactions  
Keywords
Field
DocType
adaptation,continuous-time linear equalizers (ctles),decision feedback equalizers (dfes),equalizer,intersymbol interference (isi),single loop.,cmos integrated circuits
Gigabit,Equalizer,Control theory,Computer science,Chip,Adaptive equalizer,Electronic engineering,Cmos process,CMOS,Electronic circuit,Power consumption
Journal
Volume
Issue
ISSN
PP
99
1063-8210
Citations 
PageRank 
References 
6
0.62
10
Authors
4
Name
Order
Citations
PageRank
Yong-Hun Kim1134.62
Young-Ju Kim2112.30
Taeho Lee38915.11
Lee-Sup Kim470798.58