Title
Energy-Efficient Floating-Point MFCC Extraction Architecture for Speech Recognition Systems
Abstract
This brief presents an energy-efficient architecture to extract mel-frequency cepstrum coefficients (MFCCs) for real-time speech recognition systems. Based on the algorithmic property of MFCC feature extraction, the architecture is designed with floating-point arithmetic units to cover a wide dynamic range with a small bit-width. Moreover, various operations required in the MFCC extraction are examined to optimize operational bit-width and lookup tables needed to compute nonlinear functions, such as trigonometric and logarithmic functions. In addition, the dataflow of MFCC extraction is tailored to minimize the computation time. As a result, the energy consumption is considerably reduced compared with previous MFCC extraction systems.
Year
DOI
Venue
2016
10.1109/TVLSI.2015.2413454
VLSI) Systems, IEEE Transactions  
Keywords
Field
DocType
floating-point operations,hardware optimization,mel-frequency cepstrum coefficients (mfccs),speech recognition.,feature extraction,speech recognition,hardware,mel frequency cepstral coefficient
Lookup table,Mel-frequency cepstrum,Pattern recognition,Efficient energy use,Computer science,Floating point,Cepstrum,Feature extraction,Speech recognition,Dataflow,Artificial intelligence,Energy consumption
Journal
Volume
Issue
ISSN
PP
99
1063-8210
Citations 
PageRank 
References 
4
0.51
4
Authors
3
Name
Order
Citations
PageRank
Jihyuck Jo1253.72
Hoyoung Yoo2759.99
In-Cheol Park3888124.36