Abstract | ||
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Networks-on-Chip (NoCs) are increasingly used in many-core architectures. ORION2.0 [1] is a widely adopted NoC power and area estimation tool, but its estimation models can have large errors (up to 185%) versus actual implementations. We present ORION3.0, an open-source tool whose parametric and non-parametric modeling methodologies fundamentally differ from ORION2.0 logic template-based approaches in that the estimation models are derived from actual physical implementation data. When compared with actual implementations, ORION3.0 models achieve average estimation errors of no more than 9.3% across microarchitecture, implementation, and operational parameters as well as multiple router RTL generators. A comprehensive suite of these methodologies has been implemented in ORION3.0 [2]. |
Year | DOI | Venue |
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2015 | 10.1109/LES.2015.2402197 | Embedded Systems Letters, IEEE |
Keywords | Field | DocType |
networks-on-chip,metamodeling,regression,parameter estimation,parametric statistics,microarchitecture,data models,mars,network routing,network on chip | Data modeling,Suite,Computer science,Parallel computing,Real-time computing,Implementation,Nonparametric statistics,Parametric statistics,Router,Microarchitecture | Journal |
Volume | Issue | ISSN |
PP | 99 | 1943-0663 |
Citations | PageRank | References |
28 | 0.89 | 5 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Andrew B. Kahng | 1 | 7582 | 859.06 |
B. Lin | 2 | 1405 | 126.39 |
Siddhartha Nath | 3 | 240 | 15.01 |