Name
Abstract | ||
|---|---|---|
With the advent of memristor-CMOS (MCM) process that combines CMOS processing with nano-scale memristive devices, it becomes possible to reduce utilization of silicon area thus providing a promising option in the design of MCM based circuits. Two properties of memristor have attracted the most attention. Firstly its nanometer scale dimensions and, secondly, its nonvolatile memory characteristics. The nanometer scale feature of the device creates a new opportunity for new logic elements allowing realization of innovative circuits that are removed from the more established design domains. The non-volatile memory property enables us to realize new design methods for a variety of computational elements that lead to novel architectures. In this paper, we present primitive logic blocks based on MCM design style those are also extended to special logic types like Domino logic and programmable logic array (PLA). We also provide an overview of modeling principles that would allow designers to venture into this new integrated domain. Graphical abstractDisplay Omitted HighlightsWe introduce challenges in modeling and characterization for Memristor-CMOS (MCM) circuits.Memristor was fabricated with MIM structure based on Ag/TiO2-x/TiO2/ITO nano layers.The paper presents logic design methodologies for MCM design style.MCM enables multi-layer realization of the more complex circuits and future systems. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1016/j.mejo.2014.12.006 | Microelectronics Journal |
Keywords | Field | DocType |
memristor | Logic synthesis,Domino logic,Memristor,Logic optimization,Programmable logic array,CMOS,Electronic engineering,Logic family,Engineering,Programmable logic device | Journal |
Volume | Issue | ISSN |
46 | 3 | 0026-2692 |
Citations | PageRank | References |
11 | 0.64 | 10 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kyoung-Rok Cho | 1 | 217 | 31.77 |
| Sang-jin Lee | 2 | 360 | 40.96 |
| Kamran Eshraghian | 3 | 101 | 27.54 |