Title | ||
---|---|---|
A 2.5-Gb/s DLL-Based Burst-Mode Clock and Data Recovery Circuit With 4× Oversampling. |
Year | Venue | DocType |
---|---|---|
2015 | IEEE Trans. VLSI Syst. | Journal |
Volume | Issue | Citations |
23 | 4 | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jung-Mao Lin | 1 | 28 | 4.52 |
Ching-Yuan Yang | 2 | 227 | 36.15 |
Hsin-Ming Wu | 3 | 0 | 0.34 |