Title
Variable Parallelism Cyclic Redundancy Check Circuit for 3GPP-LTE/LTE-Advanced
Abstract
Cyclic Redundancy Check (CRC) is often employed in data storage and communications to detect errors. The 3GPP-LTE wireless communication standard uses a 24-bit CRC with every turbo coded frame, thus, the CRC can be exploited to detect residual errors and to enable early stopping of iterations as well. The current state of the art lacks specific CRC implementations for this standard, and most current solutions adopt a fixed degree of parallelism, unsuitable for many turbo decoder architectures. This work proposes a variable parallelism circuit targeting the 3GPP-LTE/LTE-Advanced 24-bit CRC, that can adapt to input data of different sizes. Low complexity is achieved through careful functional sharing among the various parallelisms: comparison with the state of the art shows comparable or superior speed and extremely low complexity.
Year
DOI
Venue
2014
10.1109/LSP.2014.2334393
IEEE Signal Process. Lett.
Keywords
Field
DocType
turbo codes,wireless communication standard,turbo decoder architectures,residual error detection,word length 24 bit,3gpp-lte,crc,lte-advanced,3g mobile communication,3gpp-lte-lte-advanced,turbo coded frame,data storage,long term evolution,variable parallelism cyclic redundancy check circuit,decoding,cyclic redundancy check codes,data communications
Mathematical optimization,Wireless,Cyclic redundancy check,Degree of parallelism,Computer science,Turbo code,Real-time computing,Turbo equalizer,CRC-based framing,Longitudinal redundancy check,Computer engineering,LTE Advanced
Journal
Volume
Issue
ISSN
21
11
1070-9908
Citations 
PageRank 
References 
0
0.34
0
Authors
4
Name
Order
Citations
PageRank
Carlo Condo113221.40
Maurizio Martina226845.20
Gianluca Piccinini312219.02
Guido Masera464074.10