Abstract | ||
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Analyzing the composition of Internet traffic has many applications nowadays, like tracking bandwidth-consuming applications, QoS-based traffic engineering and lawful interception of illegal traffic. Even though many flow-based classification methods, such as support vector machines (SVM), have demonstrated their accuracy, few practical implementations of lightweight classifiers exist. We consider in this paper the design of a real-time SVM traffic classifier at hundreds of Gb/s to allow online detection of categories of applications. We also implement a high-speed flow reconstruction algorithm able to handle one million concurrent flows. The solution is based on the massive parallelism and low-level network interface access of FPGA boards. We find maximum supported bit rates up to 408 Gb/s for classification and up to 20 GB/s for flow reconstruction for the most challenging trace. Results are confirmed using a commercial Combov2 board with a Virtex 5 FPGA. Copyright (C) 2014 John Wiley & Sons, Ltd |
Year | DOI | Venue |
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2014 | 10.1002/nem.1863 | INTERNATIONAL JOURNAL OF NETWORK MANAGEMENT |
Field | DocType | Volume |
Lawful interception,Computer science,Support vector machine,Computer network,Quality of service,Field-programmable gate array,Real-time computing,Virtex,Traffic engineering,Internet traffic,Network interface | Journal | 24 |
Issue | ISSN | Citations |
4 | 1055-7148 | 0 |
PageRank | References | Authors |
0.34 | 5 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Tristan Groleat | 1 | 13 | 2.71 |
Sandrine Vaton | 2 | 215 | 29.78 |
Matthieu Arzel | 3 | 69 | 15.10 |