Title
A Methodology for Speeding up MVM for Regular, Toeplitz and Bisymmetric Toeplitz Matrices
Abstract
The Matrix Vector Multiplication algorithm is an important kernel in most varied domains and application areas and the performance of its implementations highly depends on the memory utilization and data locality. In this paper, a new methodology for MVM including different types of matrices, i.e. Regular, Toeplitz and Bisymmetric Toeplitz, is presented in detail. This methodology achieves higher execution speed than the software state of the art library, ATLAS (speedup from 1.2 up to 4.4), and other conventional software implementations, for both general (SIMD unit is used) and embedded processors. This is achieved by fully and simultaneously exploiting the combination of software and hardware parameters as one problem and not separately.
Year
DOI
Venue
2014
10.1007/s11265-013-0812-9
Journal of Signal Processing Systems
Keywords
Field
DocType
Matrix vector multiplication,Toeplitz,Data reuse,Memory management,SIMD,Data cache
Kernel (linear algebra),Computer science,Matrix (mathematics),Parallel computing,SIMD,Toeplitz matrix,Real-time computing,Software,Memory management,Matrix multiplication,Speedup
Journal
Volume
Issue
ISSN
77
3
1939-8018
Citations 
PageRank 
References 
2
0.35
18
Authors
4
Name
Order
Citations
PageRank
Vasilios I. Kelefouras1182.08
Angeliki Kritikakou26612.85
Konstantinos Siourounis320.35
Costas E Goutis418625.76