Name
Title | ||
|---|---|---|
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface |
Abstract | ||
|---|---|---|
A low-energy single-ended duobinary transceiver is proposed for the point-to-point DRAM interface with an energy efficiency of 0.56 pJ/bit at 7 Gb/s. The transmitter power is reduced by decreasing the signal swing of transmission channel to 80 mV and replacing the multiplexer and the binary output driver in the transmitter by a duobinary output driver. A trans-impedance amplifier (TIA) is used at the receiver end of transmission channel. The TIA works as a receiver termination and also amplifies the input signal for subsequent processing. Analysis of the feedback loop delay and the nonlinearity of the TIA shows that they do not impose serious problems. The TIA output signal is applied to a duobinary-to-NRZ converter, which is implemented by using a direct feedback 1-tap DFE circuit with a tap-coefficient of 1.0. The reference voltage of the duobinary-to-NRZ converter is calibrated automatically to enable a small-swing signaling. The proposed transceiver chip in a 65 nm CMOS process works at 4.5 Gb/s with a 3" FR4 microstrip line, and at 7 Gb/s with a 0.6" FR4. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/JSSC.2014.2359665 | J. Solid-State Circuits |
Keywords | Field | DocType |
termination,direct feedback 1-tap dfe circuit,microstrip lines,cmos process,transmitter power,transceivers,duobinary-to-nrz converter,tia rx termination,receiver termination,transceiver chip,signal swing,driver circuits,size 65 nm,operational amplifiers,low-energy single-ended duobinary transceiver,energy conservation,dram interface,low-power electronics,fr4 microstrip line,size 3 inch,size 7 inch,small-swing signaling,bit rate 7 gbit/s,feedback loop delay,dram chips,voltage 80 mv,transmission channel,transimpedance amplifier,trans-impedance amplifier (tia),point-to-point dram interface,duobinary,low-energy i/o,duobinary output driver,single-ended signaling,cmos digital integrated circuits,transceiver,tap-coefficient,multiplexer,bit rate 4.5 gbit/s,energy efficiency | Dram,Transmitter,Transceiver,Computer science,Voltage reference,Feedback loop,Multiplexer,Electronic engineering,Electrical engineering,Microstrip,Amplifier | Journal |
Volume | Issue | ISSN |
49 | 11 | 0018-9200 |
Citations | PageRank | References |
6 | 0.56 | 0 |
Authors | ||
9 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Soo-Min Lee | 1 | 148 | 12.00 |
| Il-Min Yi | 2 | 21 | 3.66 |
| Hae-Kang Jung | 3 | 53 | 6.80 |
| Hyunbae Lee | 4 | 26 | 5.03 |
| Yong-Ju Kim | 5 | 6 | 0.56 |
| Yunsaing Kim | 6 | 39 | 5.45 |
| Byungsub Kim | 7 | 165 | 37.71 |
| Jae-yoon Sim | 8 | 508 | 83.58 |
| Hong-june Park | 9 | 465 | 72.93 |