Name
Title | ||
|---|---|---|
Considering reconfiguration overhead in scheduling of dependent tasks on 2D reconfigurable FPGA |
Abstract | ||
|---|---|---|
Configuration prefetching is known as an effective technique for hiding the reconfiguration delay of hardware accelerators in Partial Region FPGA. In prefetching, a hardware task can be loaded as soon as possible even if it cannot execute immediately after its reconfiguration due to the involvement of dependencies with other tasks. But due to the access in advance, the configuration delay is hidden. This method can be compared with a software prefetching in the processor domain. However, in the context of reconfigurable architecture, the difficulties come from the dependencies of prefetching with task scheduling and placement aspect. In this paper, we introduce an run-time spatio-temporal scheduling heuristic for dependent tasks executed on 2D heterogeneous FPGA. The objective is to reduce the reconfiguration delay of tasks, thus minimize the total execution time of an application. To achieve it, our proposed heuristic tries to prefetch tasks as early as possible while considering two factors: the priority of new tasks to be loaded and the placement decision to avoid conflicts among tasks. The experiments show that our heuristic reduces significantly the overall execution time by 22% compared to a non-prefetching method and approximately 5% compared to other prefetching methods. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/AHS.2014.6880151 | Adaptive Hardware and Systems |
Keywords | Field | DocType |
field programmable gate arrays,reconfigurable architectures,storage management,2D heterogeneous FPGA,2D reconfigurable FPGA,configuration prefetching,dependent tasks,hardware accelerators,hardware task,nonprefetching method,partial region FPGA,placement decision,processor domain,reconfigurable architecture,reconfiguration delay,reconfiguration overhead,run-time spatio-temporal scheduling heuristic,software prefetching,task scheduling | Heuristic,Architecture,Computer science,Scheduling (computing),Parallel computing,Field-programmable gate array,Real-time computing,Software prefetching,Execution time,Instruction prefetch,Control reconfiguration,Embedded system | Conference |
ISSN | Citations | PageRank |
1939-7003 | 2 | 0.40 |
References | Authors | |
0 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Quang-Hai Khuat | 1 | 2 | 0.73 |
| Daniel Chillet | 2 | 193 | 26.12 |
| Michael Hübner | 3 | 2 | 0.73 |