Title
A Routing-Level Solution for Fault Detection, Masking, and Tolerance in NoCs
Abstract
Faults may occur in numerous locations of a router in a NoC platform. Compared with the faults in the data path, faults in the control path may cause more severe effects which may result in crashing the entire system. Most of the current efforts in literature focus on disabling a router when a fault is detected. Considering this level of coarse-granularity, the functioning parts of a router have to be unnecessarily disabled which may severely affect the performance or functionality of the on-chip network. To cope with this problem, in this paper we propose a mechanism to tolerate faults in the control path which largely avoid disabling a router as long as the fault is not severe. This mechanism is called DMT, standing for three distinguishing characteristics of the proposed method as fault Detection, fault Masking and fault Tolerance. The proposed mechanism can efficiently detect the faults expressed as illegal turns while it has the capability to tolerate faults without a prior knowledge on where and why a fault has happened.
Year
DOI
Venue
2015
10.1109/PDP.2015.87
PDP
Keywords
Field
DocType
routing,classification algorithms,fault tolerance,fault detection,network on chip,algorithm design and analysis
Stuck-at fault,General protection fault,Fault coverage,Fault detection and isolation,Computer science,Software fault tolerance,Fault (power engineering),Power-system protection,Distributed computing,Fault indicator
Conference
ISSN
Citations 
PageRank 
1066-6192
2
0.35
References 
Authors
12
5
Name
Order
Citations
PageRank
Xiaofan Zhang110411.64
Masoumeh Ebrahimi233229.96
Letian Huang3387.92
Guangjun Li4204.39
Axel Jantsch51875169.83