Name
Abstract | ||
|---|---|---|
This paper describes a CMOS interface circuit for silicon photonics. 20-Gb/s operation of an optical receiver front-end circuit is demonstrated using an optical signal applied to the optical front-end. The transimpedance amplifier (TIA) is based on an inverter with resistive and inductive feedback for low power consumption and frequency compensation. A negative capacitance generation is employed in the limiting amplifier (LA) for bandwidth extension. The combined TIA and LA block exhibits a transimpedance gain of 78 dBΩ and a bandwidth of 11 GHz. The TIA and the LA block consume 1.3 mA and 24 mA at 1 V supply voltage, respectively. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/ISCAS.2014.6865429 | ISCAS |
Keywords | Field | DocType |
cmos process,cmos integrated circuits,low power consumption,limiting amplifier,frequency compensation,optical receiver front-end,size 65 nm,inductive feedback,current 24 ma,limiting amplifier (la),operational amplifiers,cmos interface circuit,circuit feedback,resistive feedback,negative capacitance generation,low-power electronics,low-power optical receiver front-end circuit,la block,voltage 1 v,optical receivers,silicon photonics,current 1.3 ma,transimpedance amplifier,optical signal,bandwidth extension,bit rate 20 gbit/s,bandwidth 11 ghz,tia block,cmos,integrated optoelectronics,transimpedance amplifier (tia),inverter,optical fibers,noise,low power electronics,bandwidth | Computer science,Direct-coupled amplifier,Electronic engineering,CMOS,Transimpedance amplifier,Electrical engineering,Receiver front end,Power bandwidth | Conference |
ISSN | Citations | PageRank |
0271-4302 | 1 | 0.37 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gyu-Seob Jeong | 1 | 21 | 9.00 |
| Hankyu Chi | 2 | 1 | 1.38 |
| Kyungock Kim | 3 | 1 | 0.37 |
| Deog-Kyoon Jeong | 4 | 626 | 119.05 |