Name
Title | ||
|---|---|---|
A low-offset calibration-free comparator with a mismatch-suppressed dynamic preamplifier |
Abstract | ||
|---|---|---|
This paper presents a new low offset comparator with a mismatch-suppressed dynamic preamplifier Various mismatches contribute to comparators's input referred offset. The proposed mismatch suppression is achieved by sampling the mismatches at the dynamic preamplifier's output node during the precharge phase. A time-domain analysis method is utilized to quantize the suppression effects. By the techniques, a 1-GS/s four-input comparator is implemented by 65-nm CMOS technology. It achieves a 60-μW power dissipation and a 1.89-mV 1-sigma(σ) offset voltage, which is a 90% improvement compared to its non-suppressed counterparts. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/ISCAS.2014.6865646 | ISCAS |
Keywords | DocType | ISSN |
cmos analogue integrated circuits,calibration,time-domain analysis method,power dissipation,size 65 nm,preamplifiers,quantisation (signal),voltage 1.89 mv,suppression effect quantization,cmos technology,offset voltage,mismatch sampling,time-domain analysis,mismatch-suppressed dynamic preamplifier,precharge phase,comparators (circuits),power 60 muw,input referred offset,low-offset calibration-free comparator,threshold voltage,cmos integrated circuits,capacitors | Conference | 0271-4302 |
Citations | PageRank | References |
2 | 0.51 | 1 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chixiao Chen | 1 | 6 | 4.36 |
| Zemin Feng | 2 | 2 | 2.20 |
| Huabin Chen | 3 | 48 | 9.11 |
| Mingshuo Wang | 4 | 13 | 3.24 |
| Jun Xu | 5 | 5 | 1.17 |
| Fan Ye | 6 | 63 | 21.55 |
| Junyan Ren | 7 | 154 | 41.40 |