Name
Abstract | ||
|---|---|---|
Demand for smaller and lighter personal devices with increasing functionality in the cloud drives advancements in both embedded memory technology and high-speed DRAM interfaces. Lower power through voltage reduction and increased performance through higher memory density and bandwidth are key enablers. This year's conference highlights 14nm FinFET technologies with the smallest bit cells achieved to date for both SRAM — at 0.05μm2 — and embedded DRAM — at 0.01747μm2. A new assist technique to drive VMIN reduction and novel bit cells for both 2-port SRAM and TCAM applications are also presented. In addition, two area-efficient techniques to boost DRAM bandwidth are reported. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ISSCC.2015.7063049 | ISSCC |
Field | DocType | Citations |
Voltage reduction,Dram,Content-addressable memory,Computer science,Input/output,Universal memory,Static random-access memory,Bandwidth (signal processing),CAS latency,Embedded system | Conference | 0 |
PageRank | References | Authors |
0.34 | 0 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Leland Chang | 1 | 13 | 6.71 |
| Takefumi Yoshikawa | 2 | 18 | 6.62 |