Abstract | ||
---|---|---|
This paper presents a test data volume (TDV) reduction method for designs utilizing extremely high compression configurations, and it enables reducing the pin count interfacing with the Automatic Test Equipment. Based on the encoding requirements for every test cube, the proposed test compression method changes the number of shift cycles used to load the test stimuli dynamically. No additional pins or modification of the existing scan chains is needed, making the proposed method work seamlessly with existing sequential linear decompressors. Experimental results obtained for industrial designs demonstrate the effectiveness of the proposed method at reducing TDV in high compression configurations. |
Year | DOI | Venue |
---|---|---|
2014 | 10.1109/ETS.2014.6847822 | ETS |
Keywords | Field | DocType |
test compression method,high-compression designs,dynamic shift,sequential linear decompressors,data compression,automatic test equipment,logic design,integrated circuit design,encoding requirements,test data volume reduction method,test cube,scan chains,tdv reduction method,logic testing,registers,logic gates,system on chip,compaction,encoding | Compression (physics),Automatic test pattern generation,Automatic test equipment,Computer science,Interfacing,Electronic engineering,Test data,Computer hardware,Test compression,Encoding (memory),Cube | Conference |
ISSN | Citations | PageRank |
1530-1877 | 4 | 0.44 |
References | Authors | |
20 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Xijiang Lin | 1 | 687 | 42.03 |
Mark Kassab | 2 | 654 | 48.74 |
Janusz Rajski | 3 | 2460 | 201.28 |