Abstract | ||
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An important synchronous circuit element in low-power digital circuit design is the voltage level shifter at the boundary between voltage domains. In this paper, we present a full variability analysis of an optimized, synchronous pulsed half-latch level converter (PHLC) in the GLOBALFOUNDRIES 28nm technology. The variability analysis clearly illustrates the impact of ultra-low-power design on delay, energy and the energy-delay product (EDP). In particular, the normalized standard deviation for EDP in near-threshold operation is more than twice its value for nominal-supply operation. The analysis also illustrates the impact of variability on the architectural and topological decisions a designer has to make in ultra-low power design. |
Year | DOI | Venue |
---|---|---|
2013 | 10.1109/ICECS.2013.6815516 | ICECS |
Keywords | Field | DocType |
voltage converters,variability analysis,synchronous pulsed half-latch level converter,near-threshold design,nanotechnology,voltage level shifter,size 28 nm,digital circuits,low-power digital circuit design,low-power electronics,foundries,globalfoundries,synchronous circuit element,energy-delay product,ultra-low-power design,synchronous voltage converter,fluctuations,computer architecture,transistors,threshold voltage | Voltage converter,Computer science,Voltage,Electronic engineering,Synchronous circuit,Normalized standard deviation,Logic level,Transistor,Threshold voltage,Level converter,Electrical engineering | Conference |
Citations | PageRank | References |
1 | 0.36 | 6 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Temesghen Tekeste | 1 | 1 | 0.36 |
Ayman Shabra | 2 | 4 | 3.97 |
Duane Boning | 3 | 201 | 49.37 |
Ibrahim M. Elfadel | 4 | 242 | 44.16 |