Title | ||
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Power-efficient turbo-decoder design based on algorithm-specific power domain partitioning |
Abstract | ||
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Frequency-voltage scaling is an efficient technique to tackle the large power consumption of turbo decoders implemented in digital integrated circuits for wireless communications. In this paper, we propose a novel design approach that improves the efficacy of frequency-voltage scaling in turbo decoders. In particular, we present a turbo decoder based on an improved soft-output Viterbi algorithm (SOVA) and describe a VLSI implementation where we integrate the SOVA-specific large amount of short signal paths in a separate power domain. As opposed to the standard approach, where the voltage of the turbo decoder is scaled on a per-block basis, this optimization enables one to scale the voltage of the short signal paths more aggressively than the voltage of the timing-critical circuits. Silicon measurements of a fabricated proof-of-concept 180nm CMOS ASIC prototype optimized for 3GPP demonstrate that the presented SOVA-specific power domain partitioning enables additional power savings of 25% compared to the conventional block-level voltage scaling. These power savings can be extracted even at maximum operating frequency. |
Year | DOI | Venue |
---|---|---|
2014 | 10.1109/PATMOS.2014.6951907 | Power and Timing Modeling, Optimization and Simulation |
Keywords | Field | DocType |
3G mobile communication,CMOS integrated circuits,VLSI,Viterbi decoding,application specific integrated circuits,digital integrated circuits,power consumption,telecommunication power management,turbo codes,3GPP,CMOS ASIC prototype,SOVA,VLSI implementation,algorithm-specific power domain partitioning,digital integrated circuits,frequency-voltage scaling,power consumption,power efficient turbo decoder,silicon measurements,size 180 nm,soft-output Viterbi algorithm,timing-critical circuits,wireless communications | Turbo,Wireless,Power domains,Computer science,Voltage,Real-time computing,Electronic engineering,Decoding methods,Electronic circuit,Very-large-scale integration,Viterbi algorithm | Conference |
Citations | PageRank | References |
0 | 0.34 | 9 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Christoph Roth | 1 | 0 | 0.34 |
Christian Benkeser | 2 | 64 | 7.86 |
Qiuting Huang | 3 | 399 | 145.90 |