Christian Benkeser - Citegraph

Author Info

Name	Affiliation	Papers
CHRISTIAN BENKESER	ETH, Integrated Syst Lab, CH-8092 Zurich, Switzerland	16
Collaborators	Citations	PageRank
25	64	7.86
Referers	Referees	References
178	294	122

Search Limit

100294

Publications (16 rows)

Collaborators (25 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
On the Mapping of Incremental Redundancy into a Physical Layer ASIC	0	0.34	2015
An Evolved GSM/EDGE Baseband ASIC Supporting Rx Diversity	2	0.43	2015
Efficient Parallel Turbo-Decoding for High-Throughput Wireless Systems	15	0.76	2014
A 1.9 GS/s 4-bit sub-Nyquist flash ADC for 3.8 GHz compressive spectrum sensing in 28 nm CMOS	2	0.41	2014
Power-efficient turbo-decoder design based on algorithm-specific power domain partitioning	0	0.34	2014
Physical Layer Development Framework for OsmocomBB	1	0.40	2013
Efficient vlsi implementation of reduced-state sequence estimation for wireless communications	0	0.34	2013
Implementation Trade-Offs of Soft-Input Soft-Output MAP Decoders for Convolutional Codes.	12	0.68	2012
Efficient Channel Shortening For Higher Order Modulation: Algorithm And Architecture	5	0.50	2012
Low-complexity frequency synchronization for GSM systems: Algorithms and implementation.	3	0.47	2012
A novel constrained-Viterbi algorithm with linear equalization and grouping assistance.	2	0.44	2012
Successive interference cancellation for 3G downlink: Algorithm and VLSI architecture	0	0.34	2012
On the exploitation of the inherent error resilience of wireless systems under unreliable silicon	12	0.67	2012
A 390Mb/s 3.57mm2 3GPP-LTE turbo decoder ASIC in 0.13µm CMOS	5	0.77	2010
A 4.5mW digital baseband receiver for level-A evolved EDGE	4	0.62	2010
Design and Optimization of a Digital Baseband Receiver ASIC for GSM/EDGE.	1	0.37	2010

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