Name
Abstract | ||
|---|---|---|
CMOS technology scaling has reached a point where the circuit's static power is as high as the dynamic power. While further process scaling will only worsen leakage in transistors, it will benefit NEM relay technology. As asynchronous circuit design helps with dynamic power and NEM relays with static power, the use of NEM relays in asynchronous VLSI is ideal for low-power applications. In this paper, we present ways of combining both asynchronous and NEMS technologies and compare them with their CMOS counterpart. NEM relays can effectively implement not only QDI designs, but also bundled-data and power-gated circuits. We show in simulation that a 64-bit C-element, 32-bit PCHB AND and 8-bit PCHB adder implemented with NEM relays can achieve over 16X, 25X and 1.7X better energy-efficiency respectively compared to CMOS in a 90nm technology. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/ASYNC.2014.19 | Asynchronous Circuits and Systems |
Keywords | Field | DocType |
CMOS logic circuits,VLSI,adders,asynchronous circuits,logic design,low-power electronics,microrelays,nanoelectromechanical devices,C-element,CMOS technology scaling,NEM relay technology,PCHB AND adder,QDI designs,asynchronous circuit design,bundled-data circuits,circuit static power,dynamic power,energy-efficiency,low power asynchronous VLSI,low-power electronics,power-gated circuits,process scaling,size 90 nm,transistors,word length 32 bit,word length 64 bit,word length 8 bit,Bundled-data,NEMS,QDI,Relays,asynchronous MEMS,nanoswitch | Asynchronous communication,Adder,CMOS,Electronic engineering,Dynamic demand,Engineering,Electronic circuit,Transistor,Very-large-scale integration,Relay | Conference |
ISSN | Citations | PageRank |
1522-8681 | 2 | 0.39 |
References | Authors | |
11 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Benjamin Z. Tang | 1 | 2 | 0.39 |
| Sunil A. Bhave | 2 | 20 | 2.31 |
| Rajit Manohar | 3 | 1038 | 96.72 |