Title
Efficient VLSI architectures for matrix inversion in soft-input soft-output MMSE MIMO detectors
Abstract
A computational complexity analysis of matrix inversion used in soft-input soft-output minimum mean square error (MMSE) MIMO detectors and a comprehensive literature comparison of corresponding VLSI implementations are presented. They indicate that the application specific integrated circuit (ASIC) proposed in this paper is - to the best of our knowledge - the most area-throughput efficient VLSI architecture reported so far, outperforming the second best by a factor of 1.7×. The ASIC achieves the IEEE 802.11n standard's peak data rate of 600 Mbit/s.
Year
DOI
Venue
2014
10.1109/ISCAS.2014.6865311
Circuits and Systems
Keywords
Field
DocType
MIMO communication,VLSI,application specific integrated circuits,least mean squares methods,matrix inversion,ASIC,IEEE 802.11n standard,VLSI implementations,application specific integrated circuit,bit rate 600 Mbit/s,computational complexity analysis,matrix inversion,soft-input soft-output MMSE MIMO detectors,soft-input soft-output minimum mean square error MIMO detectors
Computer science,Matrix (mathematics),MIMO,Minimum mean square error,Application-specific integrated circuit,Electronic engineering,Detector,Very-large-scale integration,Megabit,Computational complexity theory
Conference
ISSN
Citations 
PageRank 
0271-4302
4
0.54
References 
Authors
5
3
Name
Order
Citations
PageRank
Dominik Auras1748.25
Rainer Leupers21389136.48
Gerd Ascheid31205144.76