Name
Abstract | ||
|---|---|---|
An approach to study the effects of single event upsets (SEU) by fault injection performed at system-level is presented. It is illustrated by results obtained on two different versions of a matrix multiplication algorithm, one standard and the second with fault tolerance capabilities. The final goal of this work is to validate fault tolerance techniques implemented at software level and provide a feedback about the weakest variables, improving thus their capabilities to tolerate faults. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/LATW.2014.6841907 | Fortaleza |
Keywords | Field | DocType |
fault tolerance,integrated circuit manufacture,integrated circuit reliability,matrix multiplication,radiation hardening (electronics),SEU fault injection effect,fault tolerance techniques,matrix multiplication algorithm,single event upsets,software level,system level,CPU,Fault-Injection,SEU,Soft Error,System-Level | Stuck-at fault,Software fault tolerance,Fault tolerance,Software,Engineering,Matrix multiplication,Fault injection,System level,Embedded system | Conference |
ISSN | Citations | PageRank |
2373-0862 | 0 | 0.34 |
References | Authors | |
7 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Wassim Mansour | 1 | 14 | 2.10 |
| Pablo Ramos | 2 | 4 | 1.42 |
| Rafic A. Ayoubi | 3 | 66 | 7.60 |
| Raoul Velazco | 4 | 124 | 19.48 |