Abstract | ||
---|---|---|
Advancements in imaging and ranging system performance creates the need for increased resolution, range, and speed of time-to-digital converters, a core part of the main data acquisition interface between the analog world and the ranging or imaging system's signal processing or computing core. In this paper, a coarse-fine hierarchical time-to-digital converter (TDC) utilizes two looped structures to achieve a wide dynamic range with high resolution and minimal dead time. The coarse stage consists of a looped TDC, a counter, and a novel counter clock control scheme which allows for indefinite range extension, while the fine stage employs a Vernier delay loop with a new edge-sensitive pulse-generator-based delay element that reduces loop non-linearity associated with mismatched rise/fall times. Also in order to achieve a high sampling rate and low dead-time during conversion, a control algorithm is devised and implemented at circuit level. Fabricated in 1.8V 0.18μm CMOS, the TDC achieves an input range of 204.8ns, 8.125ps resolution, and 7.5ns dead-time, while utilizing 35mW at 100MS/s and 0.23mm2 in core area. |
Year | DOI | Venue |
---|---|---|
2014 | 10.1109/MWSCAS.2014.6908340 | Circuits and Systems |
Keywords | Field | DocType |
CMOS integrated circuits,delay circuits,pulse generators,time-digital conversion,CMOS process,Vernier delay loop,coarse-fine hierarchical time-to-digital converter,control algorithm,counter clock control scheme,data acquisition interface,edge-sensitive pulse-generator-based delay element,high sampling rate,imaging system performance,indefinite range extension,loop nonlinearity reduction,low dead time,mismatched rise-fall times,power 35 mW,ranging system performance,signal processing,size 0.18 mum,time 204.8 ns,time 7.5 ns,time 8.125 ps,time-to-digital converters,two looped structures,voltage 1.8 V,wide dynamic range two-stage TDC,word length 15 bit,TDC,Vernier delay loop,coarse-fine architecture,laser/light detection and ranging (LIDAR),positron-emission tomography (PET),time-of-flight (ToF) | Wide dynamic range,Signal processing,Dead time,Computer science,Sampling (signal processing),Vernier scale,Electronic engineering,CMOS,Ranging,Time-to-digital converter | Conference |
ISSN | Citations | PageRank |
1548-3746 | 0 | 0.34 |
References | Authors | |
0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Narku-Tetteh, N. | 1 | 0 | 0.34 |
Titriku, A. | 2 | 0 | 0.34 |
Samuel Palermo | 3 | 142 | 22.07 |