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SAMUEL PALERMO
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Name
Affiliation
Papers
SAMUEL PALERMO
Texas A&M Univ, Analog & Mixed Signal Ctr, College Stn, TX 77840 USA
45
Collaborators
Citations
PageRank
111
142
22.07
Referers
Referees
References
517
734
248
Search Limit
100
734
Publications (45 rows)
Collaborators (100 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Analog Solutions of Discrete Markov Chains via Memristor Crossbars
2
0.38
2021
Design Of Tunable Analog Filters Using Memristive Crossbars
0
0.34
2021
A 1.5GS/s 8b Pipelined-SAR ADC with Output Level Shifting Settling Technique in 14nm CMOS
2
0.51
2020
A 32-Gb/s Simultaneous Bidirectional Source-Synchronous Transceiver With Adaptive Echo Cancellation Techniques
0
0.34
2020
A 22 Gb/s Directly Modulated Optical Injection-Locked Quantum-Dot Microring Laser Transmitter with Integrated CMOS Driver
0
0.34
2020
A 32 Gb/s Simultaneous Bidirectional Source-Synchronous Transceiver with Adaptive Echo Cancellation in 28nm CMOS
0
0.34
2019
Jitter-Robust Multicarrier ADC-Based Serial Link Receiver Architecture - (Invited Special Session Paper).
0
0.34
2019
A 52-Gb/s ADC-Based PAM-4 Receiver With Comparator-Assisted 2-bit/Stage SAR ADC and Partially Unrolled DFE in 65-nm CMOS
2
0.37
2019
Guest Editorial 2017 IEEE Custom Integrated Circuits Conference.
0
0.34
2018
A 32 Gb/s ADC-based PAM-4 receiver with 2-bit/stage SAR ADC and partially-unrolled DFE
1
0.48
2018
A Fully-integrated Multi-λ Hybrid DML Transmitter
0
0.34
2018
A 14 Gb/s Directly Modulated Hybrid Microring Laser Transmitter
0
0.34
2018
Session 29 overview: Optical- and electrical-link innovations.
0
0.34
2017
A low-power dual-mode 20-Gb/s NRZ and 28-Gb/s PAM-4 voltage-mode transmitter
0
0.34
2017
A 40Gb/s PAM4 optical DAC silicon microring resonator modulator transmitter
1
0.41
2017
F5: Wireline transceivers for Mega Data Centers: 50Gb/s and beyond
0
0.34
2017
A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS.
1
0.36
2017
A Reconfigurable 16/32 Gb/s Dual-Mode NRZ/PAM4 SerDes in 65-nm CMOS.
4
0.53
2017
A 75-MHz Continuous-Time Sigma-Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage.
1
0.37
2017
CMOS ADC-based receivers for high-speed electrical and optical links.
2
0.50
2016
A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization.
6
0.79
2016
22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization
7
0.72
2015
3.6 A 10Gb/s hybrid ADC-based receiver with embedded 3-tap analog FFE and dynamically-enabled digital equalization in 65nm CMOS
2
0.43
2015
An input pole tuned switching equalization scheme for high-speed serial links
0
0.34
2015
Adaptively-tunable RF photonic filters
0
0.34
2015
A 32 Gb/s 0.55 mW/Gbps PAM4 1-FIR 2-IIR tap DFE receiver in 65-nm CMOS
5
0.51
2015
A Wide-Band Fully-Integrated CMOS Ring-Oscillator PLL-Based Complex Dielectric Spectroscopy System
3
0.52
2015
A 75 MHz BW 68dB DR CT-Sigma Delta Modulator with Single Amplifier Biquad Filter and A Broadband Low-power Common-gate Summing Technique
1
0.43
2015
22.6 A 25Gb/s 4.4V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOS
2
0.50
2015
A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS
4
0.50
2015
LumiNOC: A Power-Efficient, High-Performance, Photonic Network-on-Chip
16
0.69
2014
A 15b, Sub-10ps resolution, low dead time, wide range two-stage TDC
0
0.34
2014
26.5 An 8-to-16Gb/s 0.65-to-1.05pJ/b 2-tap impedance-modulated voltage-mode transmitter with fast power-state transitioning in 65nm CMOS
2
0.48
2014
Silicon Photonic Transceiver Circuits With Microring Resonator Bias-Based Wavelength Stabilization in 65 nm CMOS
13
1.15
2014
A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications
1
0.41
2014
A 0.18-μm CMOS fully integrated 0.7–6 GHz PLL-based complex dielectric spectroscopy system
1
0.39
2014
An Energy-Efficient Silicon Microring Resonator-Based Photonic Transmitter
4
0.52
2014
A Design Methodology for Power Efficiency Optimization of High-Speed Equalized-Electrical I/O Architectures
6
0.59
2013
Sequential Correlated Level Shifting: A Switched-Capacitor Approach for High-Accuracy Systems.
1
0.36
2013
A ring-resonator-based silicon photonics transceiver with bias-based wavelength stabilization and adaptive-power-sensitivity receiver
13
1.38
2013
A Low-Power 26-GHz Transformer-Based Regulated Cascode SiGe BiCMOS Transimpedance Amplifier
13
1.02
2013
Digital-Assisted Asynchronous Compressive Sensing Front-End
6
0.48
2012
LumiNOC: a power-efficient, high-performance, photonic network-on-chip for future parallel architectures
9
0.53
2012
A Sub-Nyquist Rate Compressive Sensing Data Acquisition Front-End
5
0.57
2012
Clock-Jitter-Tolerant Wideband Receivers: An Optimized Multichannel Filter-Bank Approach
6
0.47
2011
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