Title
Stochastic approximation register ADC
Abstract
In this paper a stochastic approximation register ADC is proposed. The ADC is capable of achieving an ENOB of up to 10 bits. The ADC is composed of a variable noise engine, a bank of comparators with Gaussian offset noise, and a DAC. The ADC is simulated to achieve over 10 ENOB across various non-idealities using a comparator bank containing 1200 digital-cell based comparators with an input referred offset standard deviation of 12 mV.
Year
DOI
Venue
2014
10.1109/NEWCAS.2014.6934015
NEWCAS
Keywords
Field
DocType
gaussian noise,analogue-digital conversion,approximation theory,comparators (circuits),enob,gaussian offset noise,analog to digital converter,comparator bank,digital-cell based comparators,stochastic approximation register adc,variable noise engine,registers,maximum likelihood estimation,engines,noise
Comparator,Computer science,Electronic engineering,Effective number of bits,Gaussian,Successive approximation ADC,Standard deviation,Stochastic approximation,Offset (computer science)
Conference
ISSN
Citations 
PageRank 
2472-467X
3
0.54
References 
Authors
1
4
Name
Order
Citations
PageRank
Farahbakhshian, F.130.88
Allen Waters2305.03
Muhlestein, J.3124.25
Un-Ku Moon4836140.98