Name
Abstract | ||
|---|---|---|
A broad-level implementation of signature analysis that uses a built-in test module called a testing switch is presented. It is shown how board designers can incorporate the testing-switch modules to reduce the time it takes to isolate faulty chips. Both the test time and the power overhead are better with the testing-switch implementation than with schemes using built-in logic block observer circuits. The proposed technique is especially useful when boundary scan and self-test cannot be implemented in every chip of a board.<> |
Year | DOI | Venue |
|---|---|---|
1989 | 10.1109/54.32413 | Design & Test of Computers, IEEE |
Keywords | DocType | Volume |
automatic testing,logic testing,block observer circuits,broad-level implementation,built-in test module,fault isolation,power overhead,signature analysis,testing switch | Journal | 6 |
Issue | ISSN | Citations |
3 | 0740-7475 | 2 |
PageRank | References | Authors |
0.43 | 2 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Nagesh Vasanthavada | 1 | 2 | 0.43 |
| Nick Kanopoulos | 2 | 34 | 12.44 |