Name
Abstract | ||
|---|---|---|
The BSIM plus MOS transistor model is developed for simulation of digital and analog VLSI circuits in advanced submicron technologies. A compact parameter set is carefully selected to accurately characterize transistors and achieve continuity of the drain current and its derivatives across the different regions of operation. Several submicron modeling techniques are described. Simulated results agree well with measured data of transistors from two industrial technologies |
Year | DOI | Venue |
|---|---|---|
1994 | 10.1109/43.310905 | Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions |
Keywords | DocType | Volume |
MOS integrated circuits,SPICE,VLSI,circuit analysis computing,digital integrated circuits,linear integrated circuits,semiconductor device models,BSIM plus,MOS transistor model,MOSFET,SPICE model,analog VLSI circuits,digital VLSI circuits,drain current,submicron MOS VLSI circuits,submicron modeling techniques | Journal | 13 |
Issue | ISSN | Citations |
9 | 0278-0070 | 2 |
PageRank | References | Authors |
0.62 | 1 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gowda, S.M. | 1 | 2 | 0.62 |
| B. J. Sheu | 2 | 129 | 28.40 |