Name
Abstract | ||
|---|---|---|
The task of a topology selector within an analog synthesis system is to find the best available analog circuit topology out of a library for a given set of input specification. The proposed selection method consists of a combination of two approaches: procedural filtering and rule-based filtering. The procedural filtering consists of two consecutive phases based on boundary checking and interval analysis. Such a combination of different sorts of filtering is a new technique that allows an optimal trade-off between selection accuracy and required selection time. The tool that implements the method is technology independent and fully open towards newly added design knowledge. |
Year | DOI | Venue |
|---|---|---|
1995 | 10.1109/EDTC.1995.470410 | ED&TC |
Field | DocType | ISSN |
Integrated circuit layout,Topology,Analogue electronics,Computer science,Knowledge-based systems,Filter (signal processing),Electronic engineering,Network topology,Integrated circuit design,Interval arithmetic,Topology (electrical circuits) | Conference | 1066-1409 |
ISBN | Citations | PageRank |
0-8186-7039-8 | 10 | 1.42 |
References | Authors | |
2 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| P. Veselinovic | 1 | 74 | 8.08 |
| Domine M. W. Leenaerts | 2 | 221 | 47.32 |
| W. van Bokhoven | 3 | 26 | 3.89 |
| F. Leyn | 4 | 76 | 8.67 |
| F. Proesmans | 5 | 10 | 1.42 |
| Georges G. E. Gielen | 6 | 2036 | 254.40 |
| W. Sansen | 7 | 450 | 118.19 |