Name
Abstract | ||
|---|---|---|
An approach to modular and hierarchical sequential circuit test generation, which exploits a top-down design methodology, uses high level test knowledge and constraint driven module test generation to target faults at the structural level, is introduced in this paper. Results obtained for several designs are provided to demonstrate the effectiveness of our approach and the need for high level knowledge along with global constraints while deriving sequential circuit tests |
Year | DOI | Venue |
|---|---|---|
1993 | 10.1109/TEST.1993.470643 | Baltimore, MD |
Keywords | Field | DocType |
automatic testing,design for testability,fault diagnosis,integrated circuit testing,logic testing,sequential circuits,AM2910,ATKET,CHEETA,MTC100,VLSI,constraint driven module test generation,global constraints,hierarchical sequential circuit test generation,hierarchical sequential tests,high level test knowledge,top-down design | Design for testing,Automatic test pattern generation,Sequential logic,Computer science,Top-down and bottom-up design,Algorithm,Design methods,Electronic engineering,Modular design,Very-large-scale integration,Structural level | Conference |
ISBN | Citations | PageRank |
0-7803-1430-1 | 34 | 2.52 |
References | Authors | |
8 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Praveen Vishakantaiah | 1 | 34 | 2.52 |
| Jacob A. Abraham | 2 | 34 | 2.52 |
| Saab, D.G. | 3 | 186 | 20.19 |