Abstract | ||
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This paper presents a new method for design of variable fractional delay (VFD) FIR digital filters using a genetic algorithm. In this method, each sub-filter of Farrow structure is designed separately with defined accuracy and bandwidth. Also, a variable mutation probability is employed, which improves the accuracy of the solution. Compared with existing methods, it reduces the computational complexity and enhances the design flexibility. Sum-of-power-of-two (SOPOT) representation is applied to the filter coefficients. Therefore, SOPOT coefficients of Farrow structure are determined using a simple genetic algorithm without recourse to computational techniques. Using the SOPOT representation, the filter multipliers can be built with simple shift registers and adders. This results in a high-speed and low-power filter implementation. |
Year | DOI | Venue |
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2003 | 10.1109/ICECS.2003.1301973 | Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference |
Keywords | Field | DocType |
fir filters,adders,digital filters,genetic algorithms,integrated circuit design,low-power electronics,probability,shift registers,farrow structure sub-filter,sopot coefficients,computational complexity,design flexibility,filter coefficients,filter multipliers,genetic algorithm,high-speed low-power filter implementation,sub-filter accuracy,sub-filter bandwidth,sum-of-power-of-two representation,variable fractional delay fir digital filter design,variable mutation probability | Shift register,Digital filter,Adder,Algorithm,Electronic engineering,Bandwidth (signal processing),Mutation probability,Genetic algorithm,Mathematics,Computational complexity theory,Filter design | Conference |
Volume | ISBN | Citations |
1 | 0-7803-8163-7 | 2 |
PageRank | References | Authors |
0.55 | 3 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Khadijeh Khamei | 1 | 2 | 0.55 |
Abdolreza Nabavi | 2 | 47 | 17.09 |
Shaahin Hessabi | 3 | 269 | 31.97 |