Paper Info
Title
Low power LVDS transmitter with low common mode variation for 1GB/s-per pin operation
Abstract
This paper presents the design of a low voltage differential signalling (LVDS) transmitter intended using a LCD panel interface and is capable of transmitting 1GB/s per pin data rate. The transmitter is fully LVDS standard compatible which is achieved by employing a common mode feedback circuit to meet all Ac and DC specifications over PVT variation, specifically due to the implementation of feedback circuit, the common mode variation is made very less quiescent current of 5.5mA. Further, the implementation incorporates the idea of sharing of bias blocks among different transmitters in full chip resulting in less active area. The transmitter is implemented in 3.3V, 0.35μ CMOS technology. In this implementation the active area (excluding ESD) per transmitter is 0.039 mm square. The initial silicon data (output offset voltage of 1.20V and differential voltage of 320mV) at room temperature shows the consistency of the simulation results.
Year
DOI
Venue
2004
10.1109/ISCAS.2004.1328396
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium
Keywords
Field
DocType
CMOS integrated circuits,current-mode circuits,feedback,flat panel displays,integrated circuit design,liquid crystal displays,low-power electronics,transmitters,0.35 micron,1.20 V,3.3 V,320 mV,5.5 mA,AC specifications,CMOS technology,DC specifications,LCD panel interface,PVT variation,common mode feedback circuit,common mode variation,low power LVDS transmitter,low voltage differential signalling transmitter
Transmitter,Input offset voltage,Computer science,CMOS,Electronic engineering,Integrated circuit design,Resistor,Common-mode signal,Low voltage,Electrical engineering,Low-power electronics
Conference
Volume
ISBN
Citations 
1
0-7803-8251-X
4
PageRank 
References 
Authors
0.66
0
2
Name
Order
Citations
PageRank
Gunjan Mandal140.66
Pradip Mandal28423.04