Abstract | ||
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This paper presents the experimental evaluation of a fully-differential offset-compensated voltage comparator designed for use in multilevel (ML) Flash memory sensing. The comparator is made up by an input buffering stage followed by a gain stage that performs a regenerative action. The input stage, which must provide high input common mode range, is powered by a high-voltage supply VPP, while the gain stage is operated from the standard supply VDD, thus limiting current drawing from VPP. The circuit has been integrated in a 0.13-μm triple-well Flash CMOS process. The experimental evaluation showed an overall comparison time of 35 ns with an input signal of 10 mV and a current consumption of 15 μA from VPP. These results make the proposed solution well suited for ML sensing. |
Year | DOI | Venue |
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2004 | 10.1109/ISCAS.2004.1329357 | Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium |
Keywords | Field | DocType |
CMOS logic circuits,buffer storage,comparators (circuits),flash memories,integrated circuit design,multivalued logic,network topology,0.13 micron,10 V,15 muA,35 ns,current consumption,fully-differential offset-compensated voltage comparator design,gain stage,high-voltage supply,input buffering stage,multilevel Flash memory sensing,triple-well Flash CMOS process | Flash memory,Comparator,Limiting current,Computer science,Gain stage,Electronic engineering,Integrated circuit design,Common-mode signal,Electronic circuit,Threshold voltage | Conference |
Volume | ISBN | Citations |
2 | 0-7803-8251-X | 0 |
PageRank | References | Authors |
0.34 | 2 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Alessandro Cabrini | 1 | 108 | 24.11 |
R. Micheloni | 2 | 26 | 10.36 |
Osama Khouri | 3 | 41 | 14.44 |
Gregori, S. | 4 | 0 | 0.34 |