Name
Abstract | ||
|---|---|---|
Behavioral simulation is faster than gate-level logic simulation, however the simulation speed is too slow for large systems. Simulation specific machines accelerate simulation by parallel processing. We developed the method to extract parallelism from behavioral descriptions for fast simulation utilizing these machines. We evaluated our methods utilizing CAD accelerator TP5000. By the extraction of the parallelism the simulation speed is accelerated by about 7 times |
Year | DOI | Venue |
|---|---|---|
1997 | 10.1109/EDTC.1997.582385 | Paris |
Keywords | Field | DocType |
circuit analysis computing,digital simulation,hardware description languages,high level synthesis,CAD accelerator,behavioral descriptions,behavioral simulation,logic simulation,parallel processing,simulation specific machines,simulation speed | Logic synthesis,Logic gate,Computer science,High-level synthesis,Parallel computing,Electronic design automation,Logic simulation,Acceleration,Hardware description language,Discrete event simulation | Conference |
ISSN | ISBN | Citations |
1066-1409 | 0-8186-7786-4 | 0 |
PageRank | References | Authors |
0.34 | 3 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shoji, M. | 1 | 0 | 0.34 |
| Fumiyasu Hirose | 2 | 258 | 97.57 |
| Shimogori, S. | 3 | 0 | 0.34 |
| Kowatari, S. | 4 | 0 | 0.34 |