Paper Info
Title
Exploring energy/performance tradeoffs in shared memory MPSoCs: snoop-based cache coherence vs. software solutions
Abstract
Shared memory is a common interprocessor communication paradigm for single-chip multi-processor platforms. Snoop-based cache coherence is a very successful technique that provides a clean shared-memory programming abstraction in general-purpose chip multi-processors, but there is no consensus on its usage in resource-constrained multiprocessor systems on chips (MPSoCs) for embedded applications. This work aims at providing a comparative energy and performance analysis of cache coherence support schemes in MPSoCs. Thanks to the use of a complete multi-processor simulation platform, which relies on accurate technology-homogeneous power models, we were able to explore different cache-coherent shared-memory communication schemes for a number of cache configurations and workloads.
Year
DOI
Venue
2005
10.1109/DATE.2005.148
DATE
Keywords
Field
DocType
cache storage,embedded systems,performance evaluation,shared memory systems,system-on-chip,cache-coherent communication,embedded applications,energy/performance tradeoffs,general-purpose chip multiprocessors,multiprocessor simulation platform,multiprocessor systems on chips,performance analysis,shared memory MPSoC,shared-memory programming abstraction,single-chip multiprocessor platforms,snoop-based cache coherence,software solutions,technology-homogeneous power models
Computer architecture,Cache pollution,Cache,Computer science,MESIF protocol,MESI protocol,Parallel computing,Cache algorithms,Real-time computing,Cache coloring,Bus sniffing,Cache coherence
Conference
ISSN
ISBN
Citations 
1530-1591
0-7695-2288-2
10
PageRank 
References 
Authors
0.87
11
2
Name
Order
Citations
PageRank
Mirko Loghi121817.83
Massimo Poncino289095.31