Abstract | ||
---|---|---|
In the past performance counters have been available to top-end microprocessors as hardware luxuries for profiling critical applications. Today, on the contrary', several desktop microprocessors contain hardware support for monitoring performance events. This paper proposes a new approach to automatic test program generation that exploits such hardware to monitor specific micro-architectural events. In the approach, the generation tool repeatedly evaluates and improves candidate programs directly running on the target microprocessor: candidate programs are not "simulated", but rather "executed". The fast evaluation of candidate tests enables the use of an automatic methodology even on large designs. As a case study, an experiment targeting the Intel® Pentium® 4 microprocessor is reported. |
Year | DOI | Venue |
---|---|---|
2004 | 10.1109/MTV.2004.5 | Microprocessor Test and Verification |
Keywords | Field | DocType |
automatic test pattern generation,microprocessor chips,Intel Pentium 4 microprocessor,automatic test program generation,desktop microprocessors,internal performance counters,microarchitectural events,performance event monitoring,top-end microprocessors | Automatic test pattern generation,Computer architecture,Computer science,Automatic test program generation,Profiling (computer programming),Microprocessor,Real-time computing,Exploit,Pentium,Embedded system | Conference |
ISSN | ISBN | Citations |
1550-4093 | 0-7695-2320-X | 9 |
PageRank | References | Authors |
0.78 | 8 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Lindsay, W. | 1 | 9 | 0.78 |
E. Sanchez | 2 | 130 | 16.50 |
Reorda, M.S. | 3 | 388 | 39.51 |
G. Squillero | 4 | 330 | 30.36 |