Name
Abstract | ||
|---|---|---|
This paper presents a digital scheme to correct undesired skews between couples of clocks of synchronous systems. Correction is automatically and very fastly performed during system run-time. The proposed scheme is self-checking with respect to a wide set of possible internal (permanent as well as temporary) faults, and is easily scalable to account for different skew tolerance/sensitivity requirements. It is suitable to be implemented in VLSI, very deep submicron technology, as well as using field programmable gate arrays |
Year | DOI | Venue |
|---|---|---|
1999 | 10.1109/TEST.1999.805793 | Atlantic City, NJ |
Keywords | Field | DocType |
Monte Carlo methods,VLSI,automatic testing,built-in self test,clocks,delay lines,fault diagnosis,field programmable gate arrays,integrated circuit testing,Monte Carlo simulation,VLSI,clocks,field programmable gate arrays,permanent faults,run-time,self-checking scheme,skew correction,skew tolerance/sensitivity,synchronous systems,temporary faults,very deep submicron technology | Monte Carlo method,Computer science,Automatic testing,Field-programmable gate array,Real-time computing,Electronic engineering,Self checking,Skew,Very-large-scale integration,Built-in self-test,Scalability | Conference |
ISSN | ISBN | Citations |
1089-3539 | 0-7803-5753-1 | 4 |
PageRank | References | Authors |
0.49 | 13 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| C. Metra | 1 | 373 | 39.73 |
| Flavio Giovanelli | 2 | 4 | 0.49 |
| Mani Soma | 3 | 497 | 73.41 |
| Bruno Riccò | 4 | 359 | 53.70 |