Abstract | ||
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When a feedback bridging fault occurs in a combinational circuit and it is activated, logical oscillation may be generated at the bridging signal lines. In this paper, the necessary conditions are presented for feedback bridging faults to generate logical oscillation. Also, a method is proposed to identify such faults in feedback bridging ones. It is based on piecewise-linearlized models obtained from input/output characteristics of logic gates and does not require circuit simulation of large size of circuits to identify them. In the experiments for evaluating the method, all of the feedback bridging faults to generate logical oscillation are identified by using the method. |
Year | DOI | Venue |
---|---|---|
1999 | 10.1109/ATS.1999.810725 | Test Symposium, 1999. |
Keywords | Field | DocType |
CMOS logic circuits,circuit feedback,circuit oscillations,combinational circuits,fault diagnosis,integrated circuit testing,logic testing,piecewise linear techniques,CMOS process technology,combinational circuit,feedback bridging fault identification,input/output characteristics,logic gates,logical oscillation generation,piecewise-linearized models | Logic gate,Oscillation,Computer science,Bridging fault,Control theory,Fault detection and isolation,Bridging (networking),CMOS,Combinational logic,Electronic engineering,Electronic circuit | Conference |
ISSN | ISBN | Citations |
1081-7735 | 0-7695-0315-2 | 6 |
PageRank | References | Authors |
0.56 | 2 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Masaki Hashizume | 1 | 98 | 27.83 |
Hiroyuki Yotsuyanagi | 2 | 70 | 19.04 |
Takeomi Tamesada | 3 | 45 | 12.49 |