Abstract | ||
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A differential algorithm for concurrent simulation of path delay faults in sequential circuits is presented. The simulator analyzes all three conditions, namely, initialization, signal transition propagation through the path, and fault effect observation at a primary output for vector pairs and considers the hazard states occurring between vectors. The main contribution is in methods of propagating signals between time frames. An optimistic method assumes that all nondestination flip-flops are not affected by delays. The pessimistic method converts all nondestination flip-flops with nonsteady values to the unknown state before these values are propagated beyond the time frame in which a path is activated. A 13-valued algebra is shown to improve the efficiency of fault simulation. |
Year | DOI | Venue |
---|---|---|
2000 | 10.1109/92.831443 | VLSI) Systems, IEEE Transactions |
Keywords | Field | DocType |
delays,fault simulation,flip-flops,logic simulation,sequential circuits,differential algorithm,fault effect,hazard state,initialization,many-valued algebra,nondestination flip-flop,path delay fault simulation,sequential circuit,signal transition propagation,vector pair | Signal processing,Sequential logic,Numbering scheme,Fault detection and isolation,Computer science,Algorithm,Electronic engineering,Real-time computing,Robustness (computer science),Logic simulation,Flip-flop,Fast path | Journal |
Volume | Issue | ISSN |
8 | 2 | 1063-8210 |
Citations | PageRank | References |
27 | 1.59 | 24 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Tapan J. Chakraborty | 1 | 258 | 26.11 |
Vishwani D. Agrawal | 2 | 3502 | 470.06 |
Michael L. Bushnell | 3 | 462 | 82.27 |