Paper Info
Title
High speed and ultra-low power 16/spl times/16 MAC design using TG techniques for web-based multimedia system
Abstract
In this paper a study has been presented on high speed (HS) and 79 mW low power (LP) 16/spl times/16 MAC performance of new XOR-based circuits using transmission gate logic (TG) implemented on 0.65 /spl mu/m CMOS DLP/DLM technology. It is shown that our proposed MAC results in better performance than other published MACs due to no DC leakage currents for low power and bypassing unnecessary switching activities with latches before and after the multiplier for high speed.
Year
DOI
Venue
2000
10.1109/ASPDAC.2000.835057
design automation conference
Keywords
DocType
ISBN
cmos digital integrated circuits,high-speed integrated circuits,low-power electronics,multimedia computing,multiplying circuits,reduced instruction set computing,0.65 micron,79 mw,cmos dlp/dlm technology,mac design,tg techniques,xor-based circuits,latches,multiplier-accumulator macro,transmission gate logic,web-based multimedia system,adders,digital signal processing,real time systems,application software,low power electronics,image processing,circuits
Conference
0-7803-5973-9
Citations 
PageRank 
References 
1
0.43
1
Authors
4
Name
Order
Citations
PageRank
Seung-Min Lee119326.72
Tin-Hong Chung210.43
Hyung-Seok Yoon310.43
Mike Myung-Ok Lee444.04