Abstract | ||
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This brief describes a new mismatch-insensitive amplifier with an accurate gain of two and with the parasitic effects compensated. It is based on associating four sets of two capacitors in series during the amplification phase. The amplifier operates within a single clock cycle and uses only one amplifier. A detailed study of the different nonideal effects is presented. Simulated results demonstrate that a gain accuracy enhancement of the order of 4-5 bits can be achieved with respect to conventional realizations |
Year | DOI | Venue |
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2007 | 10.1109/TCSII.2006.884123 | Circuits and Systems II: Express Briefs, IEEE Transactions |
Keywords | Field | DocType |
amplifiers,capacitors,switched capacitor networks,4 to 5 bit,amplification phase,component mismatches,mismatch-insensitive amplifier,switched-capacitor multiply-by-two amplifier,Mismatch-insensitive amplifier,multiply-by-two amplifier (MBTA),switched-capacitor (SC) circuits | Current-feedback operational amplifier,Fully differential amplifier,Control theory,Operational transconductance amplifier,Direct-coupled amplifier,Linear amplifier,Electronic engineering,FET amplifier,Cascade amplifier,Operational amplifier,Mathematics | Journal |
Volume | Issue | ISSN |
54 | 1 | 1549-7747 |
Citations | PageRank | References |
2 | 0.52 | 5 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
João Goes | 1 | 88 | 27.95 |
Joo Cardoso Pereira | 2 | 2 | 0.52 |
Nuno Paulino | 3 | 28 | 6.24 |
Manuel Medeiros Silva | 4 | 19 | 4.24 |