Name
Playground
About
FAQ
GitHub
Playground
Shortest Path Finder
Community Detector
Connected Papers
Author Trending
Hind Hamrouni
Daniel P. Kennedy
Dan Graur
Barbara Aquilani
Maturilli, A.
Maximilian Dürr
Jhonathan Pinzon
Liangliang Shang
Chen Ma
Jie Huang
Home
/
Author
/
JOÃO GOES
Author Info
Open Visualization
Name
Affiliation
Papers
JOÃO GOES
Univ Nova Lisboa, Fac Ciencias & Tecnol, Dept Engn Electrotecn, P-2829516 Caparica, Portugal
49
Collaborators
Citations
PageRank
80
88
27.95
Referers
Referees
References
214
366
172
Search Limit
100
366
Publications (49 rows)
Collaborators (80 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Mostly Passive Delta - Sigma ADC with a-IGZO TFTs for Flexible Electronics
0
0.34
2021
A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications
2
0.41
2020
Positive-Negative Dc-Dc Converter Using Amorphous-Ingazno Tfts
0
0.34
2020
A new family of CMOS inverter-based OTAs for biomedical and healthcare applications.
0
0.34
2020
A Temperature-Compensated Class-AB Parametric Residue Amplifier for SAR-Assisted Pipeline ADCs
0
0.34
2020
Sixth-Order Differential Sallen-And-Key Switched Capacitor Lpf Using A-Igzo Tfts
0
0.34
2019
Improving Dual-Slope A/D Converter with Noise-Shaping and Digital Filtering Techniques
0
0.34
2019
A Systematic Design Methodology for Optimization of Sigma-Delta Modulators Based on an Evolutionary Algorithm
0
0.34
2019
Built-in self test of high speed analog-to-digital converters
0
0.34
2019
Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement.
1
0.37
2018
Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving.
1
0.37
2018
A Third-Order MASH $\Sigma \Delta $ Modulator Using Passive Integrators.
3
0.38
2017
A Robust Fully-Dynamic Residue Amplifier For Two-Stage Sar Assisted Pipeline Adcs
0
0.34
2017
Threshold Voltage Extraction Techniques Adaptable From Sub-Micron Cmos To Large-Area Oxide Tft Technologies
1
0.43
2017
A Two-Step Radio Receiver Architecture Fully Embedded Into A Charge-Sharing Sar Adc
0
0.34
2017
Microneedle Based ECG - Glucose Painless MEMS Sensor with Analog Front End for Portable Devices.
0
0.34
2017
Introduction to the special issue on PRIME 2016 and SMACD 2016
0
0.34
2017
Undergraduate Electronics Projects Based on the Design of an Optical Wireless Audio Transmission System.
0
0.34
2017
Oxide TFTs on Flexible Substrates for Designing and Fabricating Analog-to-Digital Converters.
0
0.34
2016
A high-gain, high-speed parametric residue amplifier for SAR-assisted pipeline ADCs
0
0.34
2016
Advanced amplification techniques for nanoscale CMOS in the context of IoT node sensors
0
0.34
2016
Wideband noise cancelling balun LNA with feedback biasing
0
0.34
2016
TCAD Simulation of Amorphous Indium-Gallium-Zinc Oxide Thin-Film Transistors.
0
0.34
2016
Towards Cloud-Based Engineering Systems.
0
0.34
2015
A Simple Class-D Audio Power Amplifier Using A Passive Ct Sigma Delta Modulator For Medium Quality Sound Systems
0
0.34
2015
Design of a robust general-purpose low-offset comparator based on IGZO thin-film transistors
1
0.41
2015
Analog-to-Digital Converters with embedded IF mixing using variable reference voltages
1
0.39
2014
A new mismatch-insensitive 1.5-bit MDAC with unity feedback-factor and enhanced performance
0
0.34
2014
A hybrid current-mode passive second-order continuous-time ΣΔ modulator
1
0.36
2014
Contributing to the Internet of Things.
8
1.22
2013
Cascode amplifiers with low-gain variability using body-biasing temperature and supply compensation
0
0.34
2013
Design of Robust CMOS Amplifiers Combining Advanced Low-Voltage and Feedback Techniques.
1
0.43
2012
Design Methodology For Sigma-Delta Modulators Based On A Genetic Algorithm Using Hybrid Cost Functions
11
1.18
2012
A 1.2 V 300 μW second-order switched-capacitor Δ∑ modulator using ultra incomplete settling with 73 dB SNDR and 300 kHz BW in 130 nm CMOS.
3
0.63
2011
A second-order switched-capacitor ΔΣ modulator using very incomplete settling
1
0.40
2011
CMOS Fully Differential Feedforward-Regulated Folded Cascode Amplifier
1
0.43
2011
A Fully Integrated and Reconfigurable Architecture for Coherent Self-Testing of High Speed Analog-to-Digital Converters
3
0.44
2011
Fast-settling low-power two-stage self-biased CMOS amplifier using feedforward-regulated cascode devices.
0
0.34
2010
An 8-bit 120-MS/s Interleaved CMOS Pipeline ADC Based on MOS Parametric Amplification
5
0.54
2010
Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency
11
1.08
2010
Switched-Capacitor Multiply-By-Two Amplifier Insensitive to Component Mismatches
2
0.52
2007
A 0.9V /spl Delta//spl Sigma/ Modulator with 80dB SNDR and 83dB DR Using a Single-Phase Technique
8
3.01
2006
A low-voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing
1
0.38
2005
Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme
6
0.75
2005
Switched-capacitor circuits using a single-phase scheme
1
2.90
2005
Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver
1
0.40
2003
An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs
9
1.45
2002
Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion
5
0.97
2002
Optimum Resolution-Per-Stage In High-Speed Pipelined A/D Converters Using Self-Calibration
0
0.34
1995
1
